IFX_2022 - Project - PAM-B
PSS RFS DR RF PTE PRE
2025-07-03
IFX_2022 - Project - PAM-B
1 Overview
1.1 Flow_chart
1.1.1 Flow_chart.png
00_Flow_chart.png
1.1.2 Roles.png
01_Roles.png
1.1.3 Responsibility_Design.png
02_Responsibility_Design.png
1.1.4 Responsibility_LO_TO_AD_BOM.png
03_Responsibility_LO_TO_AD_BOM.png
1.2 Summary
1.2.1 PAM_B_Overview_AD2_summary_29-8-2023.pdf
2 Mini-pac_PAM_B
2.1 Introduction
2.1.1 Motivation.pdf
2.1.2 Line-up_calculation.png
02_Line-up_calculation.png
2.1.3 Die_selection.pdf
2.2 Design
2.2.1 Stack_up_Laminate.png
01_Stack_up_Laminate.png
2.2.2 Stack_up_Moscap.png
02_Stack_up_Moscap.png
2.2.3 PAM_B 2_88mm Driver.pdf
2.2.4 P49_Main_Transistor.pdf
2.2.5 P41_Peak_Transistor.pdf
2.3 Assembly
2.3.1 Planning.pdf
2.3.2 Assembly Design review.pdf
2.3.3 Assembly_drawings
2.3.3.1 PAMB_PD3pre_lib__P41_R9505A_Direct_DOE1_BW1a2a.pdf
2.3.3.2 PAMB_PD3pre_lib__P41_R9505A_N9501B_Std_3p21pF_DOE2_BW3a4a5a.pdf
2.3.3.3 PAMB_PD3pre_lib__P41_R9505A_N9501B_V3_2p57pF_DOE3_BW3a6a5a.pdf
2.3.3.4 PAMB_PD3pre_lib__P41_R9505A_N9501B_V5_2p23pF_DOE4_BW3a7a5a.pdf
2.3.3.5 PAMB_PD3pre_lib__P44_R9505A_N9501B_V8_1p89_BW3a4a5a.pdf
2.3.3.6 PAMB_PD3pre_lib__P44_T9508A_N9501B_V8_1p89_BW3a4a5a.pdf
2.3.3.7 PAMB_PD3pre_lib__P49_R9512_A_10pF22_N9501B_V4_BW1o2o3o.pdf
2.3.3.8 PAMB_PD3pre_lib__P49_R9512_A_10pF97_N9501B_V3_BW1o2o3o.pdf
2.3.3.9 PAMB_PD3pre_lib__P49_R9512_A_11pF87_N9501B_V2_BW1o2o3o.pdf
2.3.3.10 PAMB_PD3pre_lib__P49_R9512_A_8pF09_N9501B_V8_BW1o2o3o.pdf
2.4 LP_measurements
2.4.1 LP_measurement_flow.pdf
2.4.2 Anteverta
2.4.2.1 LP results run 1 PAM-B minipac T9508.pdf
2.4.3 FOCUS_VIH
2.4.3.1 LP_measurement_instructions.pdf
2.4.3.2 DOE1B_1_A063_Driver_report.pdf
2.4.3.3 DOE2B_2_D044_Main_report.pdf
2.4.3.4 DOE3B_3_A063_Peak_report.pdf
2.5 Model_vs_Measurements
2.5.1 PAM_B_Run1_Minipac_Sim_vs_Meas_V0.pdf
2.5.2 Appendix
2.5.2.1 Appendix_Model_vs_measurements.pdf
2.5.2.2 Tx_Baseline_Model_library_Manual.pdf
2.6 Conclusion
2.6.1 Conclusion.pdf
2.7 Next_steps
2.7.1 BM evaluation with PAM-B Mini-Pac.pdf
3 Design
3.1 Performance
3.1.1 Building_blocks.pdf
3.1.2 Concept_review.pdf
3.1.3 Design_review.pdf
3.2 Linearity
3.2.1 FCC_Spec_Discussion.pdf
3.2.2 Linearity.pdf
3.2.3 Measurement_method.pdf
3.3 Stability
3.3.1 SS stability STAN_PAM-B_PD3 FLU 11022023.pdf
3.3.2 Overview
3.3.2.1 Stability analysis.pdf
3.4 Sensitivity_analysis
3.4.1 Summary_sensitivity_analysis.pdf
3.4.2 PAM-B PD3 Sensitivity Analysis V04.pdf
3.5 Reliability_analysis
3.5.1 PAMB_PD3_Reliability_Analysis_V1p1.pdf
3.6 Schematic_BOM
3.6.1 Initial.pdf
3.6.2 Final_V2p3.pdf
4 Layout
4.1 PAM LGiT_substrate_design rules.pdf
4.2 PAM Assy design rules.pdf
4.3 Layout_preparation.pdf
4.4 Nominal_Layout.pdf
5 Tapeout
5.1 Building blocks update.pdf
5.2 TapeOut strategy_ Variants.pdf
5.3 Layout_and_DRC.pdf
5.4 Final_layout_TO
5.4.1 Final layouts for TO.pdf
5.4.2 Layout_snapshots.pdf
5.5 EM_simulations
5.5.1 EM_simulation_All_variants.pdf
5.5.2 EM_simulation_J09.pdf
5.5.3 Impact_molding_material.pdf
5.5.4 Impact_dielectric_thickness.pdf
6 Assembly
6.1 Pre_Tape_out
6.1.1 Assembly_Drawing_Tracker.pdf
6.1.2 BOM_tracker.pdf
6.1.3 Building_blocks_update_2.pdf
6.2 Post_Tape_out
6.2.1 LGit_laminate_assembly_report.pdf
6.2.2 Dielectric_thickness_simulation.pdf
6.2.3 Final_AD_overview.pdf
6.2.4 sample_planning.pdf
6.2.5 BW_height_measurements.pdf
6.2.6 Sample_planning
7 Tuning_CV
7.1 Tuning_inputs
7.1.1 Tuning_TO_strategy.pdf
7.1.2 Tuning_plan_details.png
02_Tuning_plan_details.png
7.1.3 BOM_tuning_guidelines.pdf
7.1.4 Compliance_matrix.pdf
7.2 CV_preparation
7.2.1 Tuning_flow.pdf
7.2.2 Actual_execution_plan.png
02_Actual_execution_plan.png
7.2.3 Logistic_Assembly_plan.pdf
7.2.4 EVB_socket_preparation.pdf
7.2.5 Final_delivery_schedule.pdf
7.2.6 Px_dB calculation method.pdf
7.3 CV_execution
7.3.1 Measurement set.pdf
7.3.2 Tuning tracking.pdf
7.3.3 Raw data_crunching.pdf
7.3.4 BOM_tracking
7.3.4.1 Full_variants.pdf
7.3.4.2 NIJ_tuning.pdf
7.3.4.3 J01F.pdf
7.3.4.4 J05_32V.pdf
7.3.4.5 J07_Final_stage.pdf
7.3.4.6 J08_Driver.pdf
7.3.4.7 J09_Main_Peak.pdf
7.3.5 Sample_tracking
7.3.5.1 Tuning_samples.pdf
7.3.5.2 AD2_samples.pdf
8 Results_Analysis
8.1 Summary.pdf
8.2 AD2_Gate
8.2.1 J01I_(T48_0102_MSEm_S)_Full_Read_out.pdf
8.2.2 J01M_(T48_0103_MSEm_S)_Full_Read_out.pdf
8.2.3 J01M_(T48_0105_MSEm_S)_Full_Readout.pdf
8.2.4 J01M_J01I_MSEm_T48_Z_sample_selection.pdf
8.2.5 J01M_T48_0103_MSEm_S_(iDPD_vs_nDPD).pdf
8.2.6 J01M_T48_0104_MSEm_Z_(iDPD_vs_nDPD).pdf
8.2.7 LUT_0102_0103.pdf
8.3 Full_Read_out
8.3.1 J01A_(S04_T24_S).pdf
8.3.2 J01B_(S19_T30_S).pdf
8.3.3 J01B_(S19_T30_S_Before_After_M).pdf
8.3.4 J01B_(S19_T30_S_M).pdf
8.3.5 J01B_S01_T09_M_S.pdf
8.3.6 J01G_(S07_T48_S_M).pdf
8.3.7 J01G_(S22_T60_M_S).pdf
8.3.8 J01M_S03_T76_S_M.pdf
8.3.9 MSE-J01G_S08_(T47_S_M).pdf
8.4 GSG_Passives_measurement
8.4.1 J06.pdf
8.5 Delta_quantification
8.5.1 Impact_of_socket_solder
8.5.1.1 J01B_S19_T30_Soldered_vs_Znew.pdf
8.5.1.2 MSE-J01A_S01_ T00 Paricon(Loadplate_3) vs Zigma.pdf
8.5.1.3 MSE-J03_S03_ T00 Zigma vs Soldered.pdf
8.5.2 Impact_of_mold
8.6 Debug_experiments
8.6.1 Impact_of_Idq_Optimization
8.6.2 Impact_of_temparature
8.6.3 Impact_of_Vds
8.7 Down_selection
8.8 Performance_improvement
8.8.1 ACLR_improvement
8.8.2 Driver_BW_improvement
8.8.3 Driver_Gain_improvement
8.8.4 Gain_dip_correction
8.8.4.1 Gain-dip correction_ choice 20 pF GRM 100V–T09–-v24-20250623_145917.pdf
8.8.5 PAE_Ppeak_improvement
8.8.6 S22_Off-state_improvement
8.8.7 Wideband_gain_flateness_improvement
8.9 Mile-stone_comparisons
9 Sim_vs_Meas
9.1 PAM_B_Simulation_vs_Measurement.pdf
10 Poster
10.1 PAM_B_PD3_Poster.png
01_PAM_B_PD3_Poster.png
[1] FALSE